1. Field of the Invention
This invention relates generally to semiconductor devices, and, more particularly, to configuring a clock timing feedback path in a semiconductor device.
2. Description of the Related Art
Processor-based systems from personal computers to mainframes may be used to perform such tasks as managing the finances of corporations, editing feature-length movies, and transmitting information around the globe. These complicated operations may be broken down into numerous smaller logical operations carried out on digital bits of information. To carry out these smaller logical operations, virtually all processor-based systems may be formed from a multitude of semiconductor devices. The internal circuitry of each semiconductor device may include hundreds to thousands of interconnected logic elements such as flip-flops and logic gates.
Processor-based systems generally provide a clock signal to each semiconductor device to coordinate the operation of the logic elements in the semiconductor devices. The clock signal typically oscillates between a logic-high state and a logic-low state at a predetermined frequency, also known as the clock speed. The state of the flip-flops and logic gates in the semiconductor device may be updated in response to the clock signal. For example, the state of the flip-flops may be updated in response to detecting the rising edge of the clock signal. Thus, the speed at which digital information may propagate through a processor-based system, and consequently, the speed at which the system may carry out its operations, may be determined in part by the clock speed.
Clock speeds have increased dramatically in recent years. For example, ten years ago, a top-of-the-line personal computer may have used oscillators with frequencies near 1 MHz. Since then, the oscillator frequencies of top-of-the-line personal computers have increased at least a thousand-fold and the clock speeds in personal computers now routinely exceed 1 GHz. As oscillator speeds rise, it becomes more important to carefully control how the oscillator signals are used to coordinate the operation of the semiconductor devices employed by processor-based systems.
A phase lock loop may be used to control the clock signal provided to logic elements in the semiconductor devices. For example, a reference clock signal may be provided to the phase lock loop, which may use this signal to provide a so-called locked clock signal to a timing path in a logic circuit. To create the locked clock signal, the phase lock loop may be hardwired to a reference point in the timing path. Using a feedback clock signal from the reference point, the phase lock loop may adjust the phase of the locked clock signal so that the locked clock signal received at the reference point is substantially in phase with the reference clock signal received at the phase lock loop, i.e., the rising edge of the locked clock signal may arrive at the specific point at substantially the same time as the rising edge of the reference clock signal arrives at the phase lock loop. Many internal circuits, however, may use a plurality of timing modes that may not all operate efficiently with a clock signal locked to a single reference point in the timing path.